Z/Architecture
IBM's 64-bit instruction set architecture implemented by its mainframe computers
z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture-based system, the z900, in late 2000. Subsequent z/Architecture systems include the IBM z800, z990, z890, System z9, System z10, zEnterprise 196, zEnterprise 114, zEC12, zBC12, z13, z14, z15, z16, and z17.
z/Architecture retains backward compatibility with previous 32-bit-data/31-bit-addressing architecture ESA/390 and its predecessors back to the 32-bit-data/24-bit-addressing System/360. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture will be unaffected by this change.
Features
z/Architecture includes almost all of the features of ESA/390, and adds some new features. Among the features of z/Architecture are
A channel subsystem with the architecture introduced by S/370-XA
Branch relative instructions introduced by ESA/390, with 16-bit signed halfword offsets
Relative long instructions, with 32-bit signed halfword offsets
Trimodal (24/31/64-bit) addresses
16 32-bit access registers (ARs) introduced by ESA/370
16 64-bit general registers (GRs), 32-bit on older architectures
16 64-bit control registers (CRs) introduced by System/370 as 32-bit
16 64-bit floating-point registers (FPRs)
32 128-bit vector registers (VRs); bits 0–63 of VR0–VR15 contain FPR0–FPR15
1 32-bit floating-point control (FPC) register
1 128-bit program-status word (PSW), which includes a 64-bit instruction address
An 8-KiB prefix storage area (PSA)
Cryptographic Facility
IEEE Binary-floating-point instructions added by ESA/390
IEEE Decimal-floating-point instructions
For information on when each feature was introduced, consult the Principles of Operation.
Extended-immediate facility
The extended-immediate facility adds instructions with 32-bit signed and unsigned immediate operands, Find Leftmost ones, and miscellaneous load instructions, e.g., Load and test, Load byte, Load logical character.
General-instructions-extension facility
The general-instructions-extension facility add 3 dozen instructions, including
Compare and branch instructions
Compare and trap instructions
Load instructions, e.g.
“Z/Architecture” enters the record as iBM's 64-bit instruction set architecture implemented by its mainframe computers. Crown Archives preserves that source wording while asking what Architecture, IBM's and 64-bit can confirm, complicate or overturn.
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This entry incorporates text from “Z/Architecture” on English Wikipedia. Contributors are listed in the page history. Text is available under the Creative Commons Attribution-ShareAlike 4.0 License. Selected authority identifiers and statements are retrieved from Wikidata under CC0; their references and qualifiers remain part of the verification path.