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X86 memory models

set of memory models of the x86 CPU

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Record originEnglish Wikipedia
Text licenseCC BY-SA 4.0
Source revisionSep 11, 2026
Entity authorityQ4299354
Source-derived summary

In computing, the x86 memory models are a set of six different memory models of the x86 CPU operating in real mode which control how the segment registers are used and the default size of pointers.

Memory segmentation

Four registers are used to refer to four segments on the 16-bit x86 segmented memory architecture. DS (data segment), CS (code segment), SS (stack segment), and ES (extra segment). Another 16-bit register can act as an offset into a given segment, and so a logical address on this platform is written segment:offset, typically in hexadecimal notation. In real mode, in order to calculate the physical address of a byte of memory, the hardware shifts the contents of the appropriate segment register 4 bits left (effectively multiplying by 16), and then adds the offset.

For example, the logical address 7522:F139 yields the 20-bit physical address:

Note that this process leads to aliasing of memory, such that any given physical address has up to 4096 corresponding logical addresses. This complicates the comparison of pointers to different segments.

Pointer sizes

Pointer formats are known as near, far, or huge. These examples each load two adjacent integers into AX and DX from an address stored at [reg].

Near pointers are 16-bit offsets within the reference segment, i.e.

Editorial summary

This brief starts where responsible research should: with the source description of “X86 memory models” as set of memory models of the x86 CPU. Everything that follows is an evidence route, not borrowed authority.

Editorial reviewA practical starting point whose main value is the path it opens into stronger specialist and primary sources. The current 211-word lead offers orientation but no explicit four-digit date, so chronology should not be assumed. The selected authority fields contribute no independent date. The account is most persuasive where memory and models can be independently traced.
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Vocabulary and entity names are the principal evidence signals here, because they determine the precision of every later search. The source revision retrieved here is dated Sep 11, 2026. The linked authority identifier is Q4299354. None of the 0 selected statements returned an explicit reference.

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This entry incorporates text from X86 memory models” on English Wikipedia. Contributors are listed in the page history. Text is available under the Creative Commons Attribution-ShareAlike 4.0 License. Selected authority identifiers and statements are retrieved from Wikidata under CC0; their references and qualifiers remain part of the verification path.