Subtractor

In electronics, a subtractor is a digital circuit that performs subtraction of numbers, and it can be designed using the same approach as that of an adder. The binary subtraction process is summarized below. As with an adder, in the general case of calculations on multi-bit numbers, three bits are involved in performing the subtraction for each bit of the difference: the minuend (

X

i

{\displaystyle X_{i}}

), subtrahend (

Y

i

{\displaystyle Y_{i}}

), and a borrow in from the previous (less significant) bit order position (

B

i

{\displaystyle B_{i}}

). The outputs are the difference bit (

D

i

{\displaystyle D_{i}}

) and borrow bit

B

i

+

1

{\displaystyle B_{i+1}}

. The subtractor is best understood by considering that the subtrahend and both borrow bits have negative weights, whereas the X and D bits are positive. The operation performed by the subtractor is to rewrite

X

i

−

Y

i

−

B

i

{\displaystyle X_{i}-Y_{i}-B_{i}}

(which can take the values -2, -1, 0, or 1) as the sum

−

2

B

i

+

1

+

D

i

{\displaystyle -2B_{i+1}+D_{i}}

.

D

i

=

X

⊕

Y

i

⊕

B

i

{\displaystyle D_{i}=X_{}\oplus Y_{i}\oplus B_{i}}

B

i

+

1

=

X

i

<

(

Y

i

+

B

i

)

{\displaystyle B_{i+1}=X_{i}<(Y_{i}+B_{i})}

,

where ⊕ represents exclusive or.

Subtractors are usually implemented within a binary adder for only a small cost when using the standard two's complement notation, by providing an addition/subtraction selector to the carry-in and to invert the second operand.

−

B

=

B

¯

+

1

{\displaystyle -B={\bar {B}}+1}

(definition of two's complement notation)

A

−

B

=

A

+

(

−

B

)

=

A

+

B

¯

+

1

{\displaystyle {\begin{alignedat}{2}A-B&=A+(-B)\\&=A+{\bar {B}}+1\\\end{alignedat}}}

Half subtractor

The half subtractors can be designed through the combinational Boolean logic circuits [2] as shown in Figure 1 and 2. The half subtractor is a combinational circuit which is used to perform subtraction of two bits.