Parallax Propeller
microprocessor
The Parallax P8X32A Propeller is a multi-core processor parallel computer architecture microcontroller chip with eight 32-bit reduced instruction set computer (RISC) central processing unit (CPU) cores. Introduced in 2006, it is designed and sold by Parallax, Inc.
The Propeller microcontroller, Propeller assembly language, and Spin interpreter were designed by Parallax's cofounder and president, Chip Gracey. The Spin programming language and Propeller Tool integrated development environment (IDE) were designed by Chip Gracey and Parallax's software engineer Jeff Martin.
On August 6, 2014, Parallax Inc. released all of the Propeller 1 P8X32A hardware and tools as open-source hardware and software under the GNU General Public License (GPL) 3.0. This included the Verilog code, top-level hardware description language (HDL) files, Spin interpreter, PropellerIDE and SimpleIDE programming tools and compilers.
In 2020, the Parallax Propeller 2 (P2X8C4M64P) was released.
Multi-core architecture
Each of the eight 32-bit cores (termed a cog) has a central processing unit (CPU) which has access to 512 32-bit long words (2 KB) of instructions and data. Self-modifying code is possible and is used internally, for example, as the boot loader overwrites itself with the Spin Interpreter.
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This entry incorporates text from “Parallax Propeller” on English Wikipedia. Contributors are listed in the page history. Text is available under the Creative Commons Attribution-ShareAlike 4.0 License. Selected authority identifiers and statements are retrieved from Wikidata under CC0; their references and qualifiers remain part of the verification path.