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Intel ADX

add-carry instruction extensions in the x86 microprocessor architecture

Architectural plans, a scale model, maps and brass measuring instruments
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Record originEnglish Wikipedia
Text licenseCC BY-SA 4.0
Source revisionDec 7, 2025
Entity authorityQ16936905
Source-derived summary

Intel ADX (Multi-Precision Add-Carry Instruction Extensions) is Intel's arbitrary-precision arithmetic extension to the x86 instruction set architecture (ISA). Intel ADX was first supported in the Broadwell microarchitecture.

The instruction set extension contains just two new instructions, though MULX from BMI2 is also considered as a part of the large integer arithmetic support.

Both instructions are more efficient variants of the existing ADC instruction, with the difference that each of the two new instructions affects only one flag, where ADC as a signed addition may set both overflow and carry flags, and as an old-style x86 instruction also reset the rest of the CPU flags. Having two versions affecting different flags means that two chains of additions with carry can be calculated in parallel.

AMD added support in their processors for these instructions starting with Ryzen.

References

External links

Intel Architecture Instruction Set Extensions Programming Reference (PDF). Intel. July 2013. Archived from the original (PDF) on 2013-09-29.

Editorial summary

This brief starts where responsible research should: with the source description of “Intel ADX” as add-carry instruction extensions in the x86 microprocessor architecture. Everything that follows is an evidence route, not borrowed authority.

Editorial reviewA valuable geographic starting point for tracing changing names, boundaries, uses and administrative responsibility. The current lead gives the account dated anchors—2013—that can be checked directly. The selected authority fields contribute no independent date. The account is most persuasive where Intel, add-carry and instruction can be independently traced.
Editorial analysis

Why this record matters

The subject matters to the places & architecture register because the source frames it as add-carry instruction extensions in the x86 microprocessor architecture. Its deeper value depends on whether names, dates, institutions and citations support that framing.

Evidence profile

The strongest evidence will usually combine a dated visual record with documents produced by the authority responsible for the place. The source revision retrieved here is dated Dec 7, 2025. The linked authority identifier is Q16936905. None of the 0 selected statements returned an explicit reference. The first chronological checks are 2013.

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Architectural summaries often privilege surviving fabric and can understate demolished phases, contested use or displaced communities. The source lead contains qualifying language; that uncertainty should survive quotation, summary and reuse. Authority statements aid reconciliation but still require their own references, qualifiers and ranks to be checked.

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Treat names, boundaries and functions as historically changeable. Maps, plans, inventories and administrative records can clarify what the place meant at different dates.

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  1. Establish the record: confirm the title “Intel ADX”, its source revision and the description used here.
  2. Expand the search: follow Intel ADX primary sources, Intel ADX archive and Intel research across catalogues and specialist indexes.
  3. Test the account: compare the strongest cited source with the responsible institution’s current record and note any disagreement.

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Source & attribution

This entry incorporates text from Intel ADX” on English Wikipedia. Contributors are listed in the page history. Text is available under the Creative Commons Attribution-ShareAlike 4.0 License. Selected authority identifiers and statements are retrieved from Wikidata under CC0; their references and qualifiers remain part of the verification path.