Kogge–Stone adder
arithmetic logic circuit
In computing, the Kogge–Stone adder (KSA or KS) is a parallel prefix form of carry-lookahead adder. Other parallel prefix adders (PPA) include the Sklansky adder (SA), Brent–Kung adder (BKA), the Han–Carlson adder (HCA), the fastest known variation, the Lynch–Swartzlander spanning tree adder (STA), Knowles adder (KNA) and Beaumont-Smith adder (BSA) (like Sklansky adder (SA), radix-4).
The Kogge–Stone adder takes more area to implement than the Brent–Kung adder but has a lower fan-out at each stage, which increases performance for typical CMOS process nodes. However, wiring congestion is often a problem for Kogge–Stone adders. The Lynch–Swartzlander design is smaller, has lower fan-out, and does not suffer from wiring congestion; however to be used the process node must support Manchester carry chain implementations. The general problem of optimizing parallel prefix adders is identical to the variable block size, multi level, carry-skip adder optimization problem, a solution of which is found in Thomas Lynch's thesis of 1996.
Design
Like all carry-lookahead adders, the Kogge-Stone adder internally tracks "generate" and "propagate" bits for spans of bits. We start with 1-bit spans, where a single column in the addition generates a carry bit if both inputs are 1 (logical AND), and propagates a carry bit if exactly one input is 1 (logical XOR). Then adjacent spans are merged together to produce generate and propagate bits for wider spans.
Merging continues until generate bits are known for all spans ending at the least significant bit, at which point these may be used as the carry inputs to compute all the sum bits in parallel.
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