ARM big.LITTLE
ARM's implementation of heterogeneous-core CPUs

ARM big.LITTLE is a heterogeneous computing architecture developed by Arm Holdings, coupling relatively battery-saving and slower processor cores (LITTLE) with relatively more powerful and power-hungry ones (big). The intention is to create a multi-core processor that can adjust better to dynamic computing needs and use less power than clock scaling alone. ARM's marketing material promises up to a 75% savings in power usage for some activities. Most commonly, ARM big.LITTLE architectures are used to create a multi-processor system-on-chip (MPSoC).
In October 2011, big.LITTLE was announced along with the Cortex-A7, which was designed to be architecturally compatible with the Cortex-A15. In October 2012, ARM announced the Cortex-A53 and Cortex-A57 (ARMv8-A) cores, which are also intercompatible to allow their use in a big.LITTLE chip. ARM later announced the Cortex-A12 at Computex 2013 followed by the Cortex-A17 in February 2014. Both the Cortex-A12 and the Cortex-A17 can also be paired in a big.LITTLE configuration with the Cortex-A7.
Advantages
For a given library of CMOS logic, active power increases as the logic switches more per second, while leakage increases with the number of transistors. When a very fast out-of-order CPU is idling at very low speeds, a CPU with much less leakage (fewer transistors) could do the same work.
Begin with the source’s own compact description: “ARM big.LITTLE” is aRM's implementation of heterogeneous-core CPUs. The dossier treats that line as a proposition to test through LITTLE, ARM's and implementation, not as a finished interpretation.
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This entry incorporates text from “ARM big.LITTLE” on English Wikipedia. Contributors are listed in the page history. Text is available under the Creative Commons Attribution-ShareAlike 4.0 License. Selected authority identifiers and statements are retrieved from Wikidata under CC0; their references and qualifiers remain part of the verification path.